The present disclosure relates to interconnect circuitry. More particularly it relates to enforcing data protection in interconnect circuitry.
It is known to provide interconnect circuitry which connects a number of master devices to a memory, such that when one of those master devices seeks access to a data item stored in the memory, the memory transaction is mediated by the interconnect circuitry, and if a data item is returned from the memory in response, this is also mediated by the interconnect circuitry. It is further known to provide the interconnect circuitry with the ability to implement a cache coherency protocol, wherein when the master devices have their own local caches, the interconnect circuitry can respond to a memory transaction received from one master device to snoop the content of local caches belonging to other master devices to determine if a local copy of the target data item (which is the subject of the memory transaction) is currently stored in one of those other local caches. If it is the interconnect can provide that local copy in response to the memory transaction, it can initiate a required update to that local copy and/or the original target data item in the memory as necessary, and so on, in order to maintain correct coherency within the system. It is also known that when a master device issues a memory transaction, which is then received by the interconnect circuitry, the memory transaction may specify a coherency type which is indicative of a type of coherency response which the interconnect circuitry should carry out, such that a copy of the target data item in another master's local cache, and the original copy thereof in memory, are left in a desired state for the purposes of the master device which issued the memory transaction once the interconnect circuitry has carried out the appropriate coherency response.